Pedro Campos

Pedro Campos

@pedrocmnz

Microelectronics and Automatics Student at Polytech Montpellier, France. Aerospace engineering student at the University of Brasília (UnB), Brazil.

Polytech Montpellier - UM Montpellier
5
Followers
11
Following
1
Public Repos
0
Private Repos

Language Breakdown

Lines of code distribution across 1 owned repositories

955K Total LOC
SystemVerilog
595,222 lines
62.4%
N/A
VHDL
234,250 lines
24.5%
N/A
Tcl
65,825 lines
6.9%
N/A
C
50,056 lines
5.2%
N/A
Makefile
3,398 lines
0.4%
N/A
Other
5,799 lines
0.6%
N/A
I

I-Shaped Developer

I-shaped

Specialist — deep expertise in SystemVerilog

SystemVerilog
VHDL
Tcl
C
Makefile

Collaboration Network

Global Impact visualization

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Pedro Campos
0 active collaborators

Repos

1

PRs

0

Growth

+18%

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Coding Streak

Contribution activity over the past year

1 day
1
Contributions
0
Commits
0
Pull Requests
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Followers 5
dubernardon

Eduardo Cozer Bernardon

@dubernardon

 Specht1000

Guilherme Specht

@Specht1000

 andrwbolsm

Andrew Santos Machado

@andrwbolsm

 vinyIsCollapsing

Vinicius

@vinyIsCollapsing

 Gusta-froes

Gustavo Fróes

@Gusta-froes
Following
11 total
cominixo

Lucas Luza

@cominixo

 Aymeric-Dcn

Aymeric-Dcn

@Aymeric-Dcn

 Specht1000

Guilherme Specht

@Specht1000

 dubernardon

Eduardo Cozer Bernardon

@dubernardon

 yagompassos

Yago Passos

@yagompassos
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Synced via GitHub

Top Repositories

Frogger-FPGA-RISCV

Simplified Frogger game implemented on a BASYS 3 FPGA using a RISC-V (IBEX) processor and VGA output.

0 0
SystemVerilog

Open Source Impact

Contributions to external projects

0 merged PRs

No external contributions found.